Schottky barrier diodes, such as in a rectifier, may involve using a p-type guard ring located at the periphery of the metal electrode. The guard ring may reduce or eliminate edge effects by reducing the electrical field concentrations and by moving the edge of the electrode away from the barrier junction. However, use of a guard ring introduces parasitic capacitance that often must be accounted for when designing a circuit.
In the past, Schottky diode devices have been used in an integrated circuit. A P+ guard ring has been used around the edge of the silicon active region and the isolation oxides. The P+ guard ring was used to improve the reliability of the integrated circuit. For example, a P+ guard ring was formed around the anode of the integrated circuit diode device. However, issues in performance may arise due to the P+ guard ring. More particularly, with a P+ guard ring, the P+ region may act as a landing pad for contacts to land on, and therefore may become part of the device and provide unwanted parasitic capacitance. When the device is used at high frequencies, the parasitic capacitance occurs from the P+ junction down to the sub-collector and plus regions; however, parasitic capacitance may also occur with an N+ junction down to the relevant sub-collector within a P-type Schottky diode structure.
FIGS. 1A, 1B and 1C illustrate top, first side and second side views, respectively, of a Schottky barrier diode (SBD) in a conventional embodiment. The SBD 100 includes cathodes 102 having cathode contacts 104, and an anode 106 having anode contacts 108. Reach-through implants 110 are located beneath the cathodes 104. A sub-collector 112 is located so as to be connected to both reach through implants 110 and serves as the actual devices cathode region. A guard ring 114 implant region is provided on the periphery of the anode 106 to reduce current leakage, improve reliability and eliminate current crowding. However, the guard ring 114 may introduce parasitic capacitance from its P+ region to the N+ sub-collector. Parasitic capacitance may be of particular issue at higher frequencies, e.g., frequencies greater than 50 GHz.